The present invention relates generally to graphics processing, and more particularly to improving the efficiency of various circuits and methods used by a graphics processor integrated circuit.
In typical computer systems, graphics processors generate images for display on a monitor. The displayed image can be as static as a text document or as dynamic as the latest computer or video game. In the latter application, the demand by users for increasingly realistic images has become insatiable. In an attempt to appease this appetite, the performance of graphics processors has been rapidly improved.
As the performance of graphics processors has been improved, the workload has become particularly burdensome on a few specific circuits. For example, the amount of data transferred between a graphics processor and its memory, which is referred to as a graphics memory, has increased dramatically. So much so that now, the performance of some graphics processors is limited by the available bandwidth or data transfer capacity between the processor and its memory. Blenders, which are circuits that combine or merge colors of overlapping structures in an image, are similarly overworked.
In general, there are two ways to improve the performance of a circuit such as a memory interface or blender in a graphics processor. Specifically, the processing capacity of the circuit can be increased, for example, by increasing the clock rate or number of circuits. Also, more efficient use can be made of the available circuits.
The clock rate for memory interfaces and blender circuits can be increased, but their clock rate tends to be limited by the process technology used in the manufacture of the graphics processor or memory integrated circuits. Also, more blenders can be added, but these tend to be very large circuits that consume significant die area and thus increase device cost.
Thus, it is desirable to increase the efficiency of data transfers between a graphics processor and its graphics memory. Also, it is desirable to increase the efficiency of the blenders on a graphics processor integrated circuit.